Study of Shift Register, Design and Implement 4-bit right shift and left shift register using D-flip flop
TITLE:
Study of Shift Register
Digital
Trainer Kit, IC7495, Patch Cord .
THEORY:
Flip flops can
be used to store a single bit of binary data (1or 0). However, in order to
store multiple bits of data, we need multiple flip flops. N flip flops are to
be connected in an order to store n bits of data. A Register is a device which
is used to store such information. It is a group of flip flops connected in
series used to store multiple bits of data.
The information
stored within these registers can be transferred with the help of shift
registers. Shift Register is a group of flip flops used to store multiple bits
of data. The bits stored in such registers can be made to move within the
registers and in/out of the registers by applying clock pulses. An n-bit shift
register can be formed by connecting n flip-flops where each flip flop stores a
single bit of data.
The registers
which will shift the bits to left are called “Shift left registers”.
The registers
which will shift the bits to right are called “Shift right registers”.
Shift registers
are basically of 4 types. These are:
Serial In
Serial Out shift register
Serial In
parallel Out shift register
Parallel In
Serial Out shift register
Parallel In
parallel Out shift register
Serial-In
Serial-Out Shift Register (SISO) –
The shift
register, which allows serial input (one bit after the other through a single
data line) and produces a serial output is known as Serial-In Serial-Out shift
register. Since there is only one output, the data leaves the shift register
one bit at a time in a serial pattern, thus the name Serial-In Serial-Out Shift
Register.
The logic
circuit given below shows a serial-in serial-out shift register. The circuit
consists of four D flip-flops which are connected in a serial manner. All these
flip-flops are synchronous with each other since the same clock signal is
applied to each flip flop.
The above
circuit is an example of shift right register, taking the serial data input
from the left side of the flip flop. The main use of a SISO is to act as a
delay element.
Serial-In
Parallel-Out shift Register (SIPO) –
The shift
register, which allows serial input (one bit after the other through a single
data line) and produces a parallel output is known as Serial-In Parallel-Out
shift register.
The logic
circuit given below shows a serial-in-parallel-out shift register. The circuit
consists of four D flip-flops which are connected. The clear (CLR) signal is
connected in addition to the clock signal to all the 4 flip flops in order to
RESET them. The output of the first flip flop is connected to the input of the
next flip flop and so on. All these flip-flops are synchronous with each other
since the same clock signal is applied to each flip flop.
The above circuit
is an example of shift right register, taking the serial data input from the
left side of the flip flop and producing a parallel output. They are used in
communication lines where demultiplexing of a data line into several parallel
lines is required because the main use of the SIPO register is to convert
serial data into parallel data.
Parallel-In
Serial-Out Shift Register (PISO) –
The shift
register, which allows parallel input (data is given separately to each flip
flop and in a simultaneous manner) and produces a serial output is known as
Parallel-In Serial-Out shift register.
The logic
circuit given below shows a parallel-in-serial-out shift register. The circuit
consists of four D flip-flops which are connected. The clock input is directly
connected to all the flip flops but the input data is connected individually to
each flip flop through a multiplexer at the input of every flip flop. The
output of the previous flip flop and parallel data input are connected to the
input of the MUX and the output of MUX is connected to the next flip flop. All
these flip-flops are synchronous with each other since the same clock signal is
applied to each flip flop.
A Parallel in
Serial out (PISO) shift register us used to convert parallel data to serial
data.
Parallel-In
Parallel-Out Shift Register (PIPO) –
The shift
register, which allows parallel input (data is given separately to each flip
flop and in a simultaneous manner) and also produces a parallel output is known
as Parallel-In parallel-Out shift register.
The logic
circuit given below shows a parallel-in-parallel-out shift register. The
circuit consists of four D flip-flops which are connected. The clear (CLR)
signal and clock signals are connected to all the 4 flip flops. In this type of
register, there are no interconnections between the individual flip-flops since
no serial shifting of the data is required. Data is given as input separately
for each flip flop and in the same way, output also collected individually from
each flip flop.
A Parallel in
Parallel out (PIPO) shift register is used as a temporary storage device and
like SISO Shift register it acts as a delay element.
Applications of
shift Registers –
The shift
registers are used for temporary data storage.
The shift
registers are also used for data transfer and data manipulation.
The serial-in
serial-out and parallel-in parallel-out shift registers are used to produce
time delay to digital circuits.
The serial-in
parallel-out shift register is used to convert serial data into parallel data
thus they are used in communication lines where demultiplexing of a data line
into several parallel line is required.
A Parallel in
Serial out shift register us used to convert parallel data to serial data.
Pin Diagram:
Logic Diagram:
Producer:
1.Mount the IC
7495 on digital trainer and make the required connections
2.Connect pins
2,3,4,5 of the IC to logic switches SW1,SW2,SW3,SW4 for applying low and high
logic levels at this input.
3. The serial
input is given to pin 1 and mode control to pin 6.
4.Pins 8 &
9 are shorted and connected to clock pulse.
5.Connect
Vcc=+5V to pin 14.
6.Pin 7 is
grounded.
Clearing Function:
1.Set the mode
control switch to low
2.set the
serial input switch SW3 to low
3.Set parallel
inputs A, B, C, D to logic “0”.
4.To clear the
registers apply clock pulse till the output is “0000”.
Serial input to parallel output:
1.After the
register has been cleared , any 4 bit serial number can be loaded into the
register
2. Set mode
control switch to low
3.Set the
serial input to high.
4.Apply a clock
pulse which will shift the serial input “1” into the register , in this case QA
is “1”.
5.Return serial
input switch SW3 to low and apply three clock pulses.The registers will show an
output of “0001”.We can load any 4 bit nymbers into the registers in this way.
Parallel input to parallel output:
1.Set the mode
control to high
2.Apply the
following inputs at A,B,C,D as 1011.
3.If we apply a
clock pulse the word will be loaded into the register.
Parallel input to serial output:
1.If the
loadaed is “1011” .Set the mode control to low.
2.Set the
serial input pin-1 to low.
3.As you apply
clock pulse the word will be shifted out serially from QD and after four clock
pulses the register will be cleared.
Truth Table:
SISO:
SIPO:
PISO:
|
CLK Pulse |
QA |
QB |
Qc |
QD (Data Output) |
|
0 |
0 |
0 |
0 |
0 |
|
1 |
1 |
1 |
0 |
1 |
|
2 |
0 |
1 |
1 |
0 |
|
3 |
0 |
0 |
1 |
1 |
|
4 |
0 |
0 |
0 |
1 |
PIPO:
|
CLK Pulse |
QA |
QB |
QC |
QD |
|
0 |
0 |
0 |
0 |
0 |
|
1 |
1 |
1 |
0 |
1 |
Conclusion:_____________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________________
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